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Cadence at the 2025 Design Automation Conference

Cadence at the 2025 Design Automation Conference
by Daniel Nenni on 06-08-2025 at 10:00 am

Cadence, a DAC 2025 industry sponsor, will exhibit in booth 1609 at the 62nd Design Automation Conference at San Francisco’s Moscone West Convention Center.

Highlights:

  • Paul Cunningham, SVP and GM of the System Verification Group, Cadence, will speak at Cooley’s DAC Troublemaker Panel. This discussion will be an open
Read More

Verific Design Automation at the 2025 Design Automation Conference

Verific Design Automation at the 2025 Design Automation Conference
by Lauro Rizzatti on 06-08-2025 at 8:00 am

62nd DAC SemiWiki

Rick Carlson, Verific Design Automation’s Vice President of Sales, is an EDA trends spotter. I was reminded of his prescience when he recently called to catch up and talk about Verific’s role as provider of front-end platforms powering an emerging EDA market.

Verific, he said, is joining forces with a group of well-funded startups… Read More


Video EP8: How Defacto Technologies Helps Customers Build Complex SoC Designs

Video EP8: How Defacto Technologies Helps Customers Build Complex SoC Designs
by Daniel Nenni on 06-06-2025 at 10:00 am

In this episode of the Semiconductor Insiders video series, Dan is joined by Chouki Aktouf, CEO and Founder of Defacto Technologies. Dan explores the challenges of building complex SoCs with Chouki, who describes challenges around managing complexity at the front end of the process while staying within PPA requirements and … Read More


ChipAgent AI at the 2025 Design Automation Conference

ChipAgent AI at the 2025 Design Automation Conference
by Daniel Nenni on 06-05-2025 at 10:00 am

ChipAgentsAtDAC

The semiconductor world is gathering at DAC 62, and ChipAgents AI is coming ready to show why agentic AI is the missing piece in modern RTL design and verification. Whether you’re drowning in terabytes of waveform data, grinding toward 100% functional coverage, or hunting for ways to accelerate time-to-market, our sessions and… Read More


Anirudh Fireside Chats with Jensen and Lip-Bu at CadenceLIVE 2025

Anirudh Fireside Chats with Jensen and Lip-Bu at CadenceLIVE 2025
by Bernard Murphy on 06-04-2025 at 6:00 am

Anirudh with Jensen and Lip Bu

Anirudh (Cadence President and CEO) had two fireside chats during CadenceLIVE 2025, the first with Jensen Huang (Founder and CEO of NVIDIA) to kick off the show, and later in the day with Lip-Bu Tan (CEO of Intel). Of course Jensen and Lip-Bu also turn up for other big vendor shows but I was reminded that there is something special about… Read More


TCAD for 3D Silicon Simulation

TCAD for 3D Silicon Simulation
by Daniel Payne on 06-03-2025 at 10:00 am

Silvaco TCAD min

Semiconductor fabs aim to have high yields and provide processes that attract design firms and win new design starts, but how does a fab deliver their process nodes in a timely manner without having to run lots of expensive silicon through the line? This is where simulation and TCAD tools come into play, and to learn more about this… Read More


Breker Verification Systems at the 2025 Design Automation Conference

Breker Verification Systems at the 2025 Design Automation Conference
by Daniel Nenni on 06-02-2025 at 10:00 am

62nd DAC SemiWiki

Breker Verification Systems Plans Demonstrations of its Complete Synthesis and SystemVIP Library and Solutions Portfolio

Attendees who step into the Breker Verification Systems booth during DAC (Booth #2520—second floor) will see demonstrations of its Trek Test Suite Synthesis and SystemVIP libraries and solutions portfolio.… Read More


The SemiWiki 62nd DAC Preview

The SemiWiki 62nd DAC Preview
by Daniel Nenni on 06-02-2025 at 6:00 am

62nd DAC SemiWiki

After being held in San Francisco since the pandemic the beloved Design Automation Conference will be on the move again. In 2026 DAC will be held in Huntington Beach. For you non-California natives, Huntington Beach is a California city Southeast of Los Angeles. It’s known for surf beaches and its long Huntington Beach Pier.… Read More


Video EP7: The impact of Undo’s Time Travel Debugging with Greg Law

Video EP7: The impact of Undo’s Time Travel Debugging with Greg Law
by Daniel Nenni on 05-30-2025 at 10:00 am

In this episode of the Semiconductor Insiders video series, Dan is joined by Dr Greg Law, CEO of Undo, He is a C++ debugging expert, well-known conference speaker, and the founder of Undo. Greg explains the history of Undo, initially as a provider of software development and debugging tools for software vendors. He explains that… Read More


Synopsys Addresses the Test Barrier for Heterogeneous Integration

Synopsys Addresses the Test Barrier for Heterogeneous Integration
by Mike Gianfagna on 05-29-2025 at 10:00 am

Synopsys Addresses the Test Barrier for Heterogeneous Integration

The trend is clear, AI and HPC is moving to chiplet-based, or heterogenous design to achieve the highest levels of performance, while traditional monolithic system-on-chip (SoC) designs struggle to scale. What is also clear is the road to this new design style is not a smooth one. There are many challenges to overcome. Some are … Read More